Quick Solutions to Solve SPICE Convergence Issues.

 

This article focuses on PSPICE, but most of the parameters and their settings  are common to other SPICE versions like XSPICE NGSPICE IsSPICE HSPICE.

The SPICE simulation convergence issues mainly occur for 3 types of problems:

  • Circuit Topology Errors

these types of errors are often signaled with precise messages from the SPICE simulation software and it is easy to identify and correct them.

  • SPICE simulator Options Settings

for example, in the transient analysis, it ‘s necessary to consider the right timestep for the working frequency of the device, and in some cases we have to settle for moderate accuracy,  because tighter the accuracy become and more likely we can find convergence errors.

  •  Unrealistic SPICE models

convergence problems can arise from SPICE models with strong non-linearities and discontinuities.

Advanced SPICE options window in PSpice

Now let’s see what are the quick solutions to solve the most common convergence issues due to these different types of problems.

Circuit Topology Errors

Missing ground, error message: Node is floating.

The SPICE algorithm calculates the voltage of each point of the circuit with respect to a reference point,
this reference point is precisely the ground which must necessarily be present in the circuit.
It ‘s enough to add the ground reference wherever we wish.

Missing DC path to ground, error message: Node is floating.

For the reasons explained in the previous case, it is necessary to check that no point of the circuit is isolated
from the ground reference. If we want to “simulate” an isolation of a node from the ground, we do it placing a
very high value resistor, which actually maintains the continuity with the ground reference.
Check that the node has a direct connection with the ground reference.

Unmodeled pins, error message: Less than two connections at node

this error occurs when there is no PSpice model attached to the Capture part or when there’s a
wire “floating”, that is connected to a device pin without connection to another pin.

Avoid loops containing voltage sources or inductor, error message: voltage source or inductor loop

We can add a small series resistance.

Avoid series cpacitors o current sources

verify that there are no series capacitors or series current sources.

Convergence Problems due to SPICE Simulation options settings

First of all it is necessary to set the timestep appropriately for the device we are simulating. For example, if we want to simulate an oscillator at 1 khz, with a period of T=1ms, we ‘ll have to set a timestep of the order of T/10 or lower, to have a decent resolution of the simulation.
Let’ s distinguish the solutions that can be adopted in the two main types of analysis, DC and Transient.
Once DC convergence is achieved the AC analysis will also converge.

SPICE DC convergence solutions

ITL1: set ITL1=500, this set iterations limit that SPICE will perform for DC and bias.

ITL2: set ITL2=500, this set iterations limit that SPICE will perform for DC and bias before giving up.

ITL6: set ITL6=100 (Advanced Options), this increases Source stepping iteration limit, Default value
is 0, which disables source stepping.

reduce ABSTOL Absolute current tolerance, it should be set to about 8 orders of magnitude below the level of maximum current,
the dafault value is 1pA

Reduce VNTOL Absolute voltage tolerance, as for ABSTOL it should be set to about 8 orders of magnitude below the level of maximum voltage, the default value is 1uV

Reduce RELTOL this is the relative error allowed for node voltage and branch current. Set RELTOL= 0.01 to reach a compromise between accuracy and simulation run time. The default value is 0.001.

GMIN set GMIN = 1n or 0,1n. GMIN is the minimum conductance across all semiconductor devices

GMINSTEPS (Advanced Options) set GMINSTEPS=200 . this option adjusts the number of increments for GMIN
during the DC analysis.

Change DC Power supplies into Pulse generator

NODESETs use .NODESETs statement to assign a voltage to a node. This can be done for example when the node-voltage table shows unrealistic voltages. If it’s not available a proper estimation of the node DC voltage, use
a .NODESET of 0V.

SPICE Transient Convergence solutions

RELTOL also for the transient analysis Set RELTOL= 0.01 (The default value is 0.001), that decreases the accuracy
of the simulation by increasing the error tolerance required for convergence.

ITL4 set ITL4=2000 , this increases the number of iterations before a nonconvergence warning is issued

reduce ABSTOL Absolute current tolerance, it should be set to about 8 orders of magnitude below the level of maximum current, the dafault value is 1pA

Reduce VNTOL Absolute voltage tolerance, as for ABSTOL it should be set to about 8 orders of magnitude below the level of maximum voltage, the default value is 1uV

ITL5 set ITL5=0 that assigns infinity to the total transient iteration limit.

Reduce rise and fall of PULSE sources

GEAR (Advanced Options) Select METHOD=GEAR, this is the integration method that SPICE uses to solve transient equations. Very useful for oscillators and switching circuits SPICE simulations.

TRTOL set TRTOL=40. this is the tolerance for integration error calculated using transient analysis. The TRTOL
value should NOT be greater than 1/RELTOL. the default value is 7.

IC set Initial conditions for the capacitors at their expected operating voltage. Setting this data causes
SPICE to bypass the DC operating point analysis.

Use reliable SPICE models.

As we know The SPICE models do not coincide with the devices they model, but represent only a partial description of them. SPICE models with strong discontinuities or non-linearities can create serious convergence problems.
These discontinuities can originate from the omission of certain device behaviors, such as element parasitics,
capacitance for all semiconductor junctions, stray capacitance, RC snubbers around diodes.
In most cases we can rely on the SPICE models released by vendors, if instead we model the device directly, we have to smooth as much as possible any cause of discontinuities and nonlinearities.

Reference:

EMA Design Automation Resolving Simulation Errors
SPICE Circuit Handbook Steven. M Sandler Charles Hymowitz

Straightforward Method to Design and Simulate with SPICE the Loop Compensation Controller for All Switching Power Supplies.

Ing. Cristoforo Baldoni

In this article we ‘ll see how to find the output power stage transfer function H(s), called the Control-to-Output function,  of the most switching power supplies: BUCK, BOOST, BUCK-BOOST, HALF-BRIDGE, FULL BRIDGE, both in voltage mode control and current mode control. In spite of the complexity of the different types of power supplies that use one or more output feedback, the output power transfer function H(s), can be reduced to a few schematic categories of general validity. We’ ll see when it’s the case to consider the effects of the RHPZ, the Right Half Plane Zero, and what it means in practical terms.
Once the components for the specific power supply have been sized, we can estimate with good approximation the transfer function which describes mathematically the output power stage. As seen in the article about the determination of POLES and ZEROS by inspection,  we ‘ll identify immediately the POLES and ZEROS which characterize the different switching categories.
We ‘ll draw the Bode plots of these functions with PSpice, and, according to their characteristics, we ‘ll choose the most suitable compensator G(s), implementing the compensation network with the operational amplifiers embedded in the microcontrollers. The SPICE simulation of the open loop transfer function G(s)*H(s), will allows us to evaluate the results for the system stability. Finally, we ‘ll apply this method in two real switching power supply: a low power flyback converter and an off-line, half-bridge switching.
This method allows us to speed up the design of the compensator G(s) in the prototyping phase before the physical measurement with the instrumentation.

It’s strongly recommended the reading of these articles:

Accessing this article you can download the following SPICE simulation files about switching power supply compensation design:

-Forward function example

-Flyback function example

-Flyback function example with a Right Half Plane ZERO

-Origin POLE compensator

-Origin POLE Transfer function implementation

-Forward function compensated example

-One ZERO two POLES compensator

-One ZERO two POLES Transfer Function Implementation

-Flyback with RHPZ compensated

-Three POLES two ZEROS compensator

-Three POLES two ZEROS Transfer Function

-Transfer function of a real Flyback converter

-Compensator for the flyback converter

-Overall compensated  transfer function of the flyback converter

-Transfer function of a real Forward converter

-Compensator for the Forward converter

-Transfer function of compensator for the Forward converter

-Overall compensated  transfer function of the Forward converter

Premium Content

Login to buy access to this content

SPICE simulation of a Combo Wave Generator.

Thanks for this article to ssleandro

 

In this article we ‘ll se how to implement a template for a Combination Wave Generator that can be a Surge Generator, a Line Impedance Stabilization Networks (LISN), motor control, ripple current, etc. This model can be very useful for hardware engineers which can utilize it in their projects to speed up project development. The platform used for the simulation is PSpice but
it can easily replicated in other SPICE simulation software.

 

The simplified model of the GPM consists of an High-Voltage source U, a charging resistor Rc, an energy storage capacitor Cc. This part of circuit is connected by a switch to 2 Pulse duration shaping resistors Rs, an impedance matching resistor Rm and a Rise time shaping indutor Lr, as in the picture below

 

 

GPM-SurgeGenerator_page3_image1

 

typical values of this components are:  Cc=7.76μF,  Rs1=14.8 Ohm,  Rm=1.05 Ohm,  Lr=9.74μH,  Rs2=23.3 Ohm. The peak voltage on Rs2 can be 1KV, 2KV,..6KV.

 

In the following schematic we set the high voltage with the initial condition of the CapacitorCc, for example for 6KV, we set 6300 in the PSpice IC field of the Cc component. We can adjust the time in U1 to make surge hit at 90/270 degree or whatever phase we want.

 

GPM-SurgeGenerator_page4_image1

 

GPM-SurgeGenerator_page4_image2

 

 

Calibration of Surge Generator.

The IEC/EN 61000-4-5 standars requires the following waveform of open-circuit voltage with no Coupling/Decoupling network (CDN) connected

 

GPM-SurgeGenerator_page5_image1

 

This is the result of the simulation that shows a voltage waveform that fullfills requirementof IEC/EN 61000-4-5

 

GPM-SurgeGenerator_page5_image2

 

 

Below the image of the waveform of short-circuit current with no CDN connected

 

GPM-SurgeGenerator_page6_image2

 

and here again the simulated results:

 

GPM-SurgeGenerator_page6_image1

 

Ipeak is about 1.5KA, T1 is 8uS and T2 is 20uS. The effective coupling impedance is 2Ohm. The simulated current waveform fulfills requirement of IEC/EN 61000-4-5 standards.

Designing and Simulation of Industrial PID Controllers using Microcontrollers

Ing. Cristoforo Baldoni

In this article we’ll see how to pass from the design of analog PID controllers for continuous-time systems to digital controllers, replacing operational amplifiers, resistors and capacitors with microcontrollers. Digital controllers are very compact, all the controller fits on a chip, including the A/D and the D/A converters, moreover, digital controllers are not affected by the aging of the components and don’t change their values with the temperature as analog components do. We’ll see how to apply the Z-transform, the equivalent of the Laplace transform, but for discrete-time systems, we’ll see how to identify the transfer function of a process and we’ll explain, with a step by step procedure, how to apply the theoretical knowledge learnt by examining an Proteus microcontroller based project, that uses its PWM output to control an oven ‘s temperature. The microcontroller has a 10 bit A/D converter. This procedure can be easily adapted with minimal adjustments to other processes to control.

Topics

 

1. Digital Control-System Block Diagrams

 

2. Linear difference equations, Z-Transform, Inverse Z-Transform and Discrete Transfer Function.

 

3. Sampling and A/D Analogic to Digital Converter

 

4. D/A Digital to Analogic Converter and ZERO ORDER HOLD  (ZOH) : Relationship between the Continuous Transfer Function and Discrete Transfer Function of a sampled Process.

 

5.  Block Diagram Manipulation of Sampled Data Systems

 

6. Methods for designing Digital Controllers, Stability.

 

7. Designing  PID controllers by microcontrollers

 

8. Transfer Function Identification and PID Tuning using the Ziegler–Nichols Method.

 

9. Practical case of a temperature control system implemented with a microcontroller PIC and simulated with ISIS Proteus: Step by step explanation of how to apply the theoretical knowledge for implementing and simulating a PID controller.

Premium Content

Login to buy access to this content

Find Poles and Zeros of Circuit by Inspection

 Ing. Cristoforo Baldoni

 

In this article we ‘ll see how to recognize the number of poles and zeros of a transfer function simply by inspection, also of a large linear network, avoiding to calculate the analytical expression of the transfer function.  After reading this article, you ‘ll be able to determine the number of poles at first glance . Once set the output, you ‘ll also be able to determine the number of zeros by inspection and calculate the exact symbolic transfer function, the exact values of zeros and poles with simple software tool available for free. Using the SPICE analysis, we ‘ll verify the results found. The purpose of this article is to explore the concept of poles and zeros of a transfer function, their phisical meaning, and provide useful analysis tool for analog circuit designers and control systems engineers.

 

How many poles has the following network?

 

polesnetworkBig

and what about this High-Pass filter?

fiveorderHPfilter

if your answer to the first question is 9 or 8 , or you don’t recognize a fifth order filter (five poles) in the filter’s picture you should read this article.

Premium Content

Login to buy access to this content

Getting Started with PyOPUS

PyOPUS is a Python based platform for very sophisticated circuit optimization and simulation automation. The use of the Python library with the simulator requires a previous SPICE OPUS installation, then refer to the relative tutorial before proceeding. Below we show how to install PyOPUS on windows 7 (64 bit). All the softwares are 32-bit but they work fine on 64-bit. We’ ll have to install the following softwares:

Python 2.6.4Programming language
NumPy 1.3.0Package for scientific computing with Python
SciPy 0.7.1Python software for mathematics, science, and engineering
MatPlotLib 0.99.1Python 2D plotting library
wxPython 2.8Blending of the wxWidgets C++ class library with Python
PyOPUS 0.6 installerthe Windows32 PyOPUS installer

All these softwares can be downloaded here

The article refers to the softare versions of the table, but the procedure is the same for the updated versions.

Let’s start with the Python installation

the default destination directory is C:Python26

the full features installation requires about 50MegaByte

after the installation we have to add an enviroment variable: Start/Control Panel/System and Security/System/Advanced system settings, now click on Enviroment Variables button.

add to “Path” variable the value “C:Python26”

Getting Started with SPICE OPUS

SPICE OPUS is an acronym for SPICE engine for OPtimization UtilitieS. It’ s a recompilation of the original Berkeley’s source code for Windows 95/98/NT and Linux operating systems with Georgia Tech Research Institute’s XSPICE mixed-mode simulator.
You can simulate analog, digital, and analog+digital circuits using SPICE OPUS. It’s available for both Windows and Linux operating systems. It does not have a built-in schematic program for selecting components and drawing circuits. SPICE OPUS is being developed by Faculty of Electrical Engineering, University of Ljubljana, Slovenia and has over 10,000 users worldwide in the areas of research, education, and industry.

In this article we’ ll show the simple procedure to install SPICE OPUS on Windows (tested on Windows 7 64 bit) and how to describe a circuit to simulate, writing a .cir file with a text editor.

After downloading the program run the Setup.exe

you can change the installation directory by clicking on Browse button, by default it is installed in C:SpiceOpus

 

when the setup is complete, open the Start menu and go to Control Panel, choose “System and Security” and again “System”, once open this window,  click on “Advanced system settings”

the “System Properties”  window pops up:

click on “Enviroment Variables…”

Add a new system variable by clicking on the lower “New” button.

Name the variable OPUSHOME. The specified directory must be the Spice Opus installation directory. Click on OK. Confirm your changes by clicking on OK in the Environment variables dialog and once more in the

System Properties dialog.

Installation on Linux

Become root.

su –

Unpack the .tar.gz archive. A directory will be created with the name that looks like

spice_opusXXX_linux_DATE_TIME

Enter this directory.

cd spice_opusXXX_linux_DATE_TIME

Start the installation script (spice.install).

./spice_install INSTALL_PREFIX

INSTALL_PREFIX is the tree where Spice Opus will be installed. The recommended location is

/usr/local. The installation script removes any previous Spice Opus installation in that tree and

replaces it with the latest version. The binaries go to INSTALL_PREFIX/bin .

After the installation is finished, you can remove the spice_opusXXX_linux_DATE_TIME

directory that was created by unpacking the .tar.gz archive.

Setting up the environment

We shall assume that you are using BASH. Add the following two lines to /etc/profile (you

must be root in order to be able to do it).

OPUSHOME=INSTALL_PREFIX

export OPUSHOME

where INSTALL_PREFIX is the tree where you installed Spice Opus.

It is also convenient if you add INSTALL_PREFIX/bin to your path. Add the following two

lines at the end of /etc/profile.

PATH=$PATH:$OPUSHOME/bin

export PATH

Log out and log in again for the changes to take effect.

Getting Started with TINA

We are going to design and test a three stages BJT basic schematic amplifier to become operative with TINA

 

After running the program we can see this window:

Globalview

On the components toolbar there are devices of “basic” tab, under the toolbar, selecting “semiconductors” on the toolbar appear several types of semiconductors

Now select “Special”

and again, we have a high number of devices to select. Let’s start selecting a Resistor

Place Resistors, to set value, double click on one and a parameters window pops up

Keep the libraries ordered

Learn to design a circuit with PSpice is a task quite simple and is enough a few pages of any manual available on line to do it. What can be confusing is the number of files with different extensions that belong to this great tool of electronic simulation. This is due to the history of PSpice, which initially developed to be used in PC by Microsim passed after to OrCAD which was at last acquired by Cadence. The original CAD Microsim was Schematics. After, the program was provided with a design tool more advanced, Capture, maintaining the ability to still use Schematics.

Schematics image:

 

 

Capture image:

 

Fortunately, the syntax used to describe a component remained the same, and all libraries with mathematical models, are the . LIB. Creating the design of a circuit with PSpice Schematics, the project will be composed of a schematic file .SCH, a control file .CIR and a circuit description file .NET both automatically generated from Schematics, and files .INC containing subcircuits, to be included in the project. The libraries containing the mathematical models to be added to the project are always .LIB, while libraries that contain graphic symbols associated with the mathematical models are the .SLB.

By using the tool of OrCAD Capture, the main project file becomes the .OPJ, and symbolic libraries are now .OLB. In short, in Schematics a component is completely defined by libraries .LIB and .SLB while in OrCAD Capture by the couple .LIB an .OLB.

Currently most of designers use OrCAD Capture for the circuits design, however, the same Capture has a tool to convert project designed with Schematics and convert .SCH and .SLB in .OPJ and .OLB. We ‘ll see how in a dedicated article.

SPICE Simulation Software

It follows a list of major SPICE simulation software, commercial and free:

CompanySPICE softwareImagesoftware license
AltiumAltium DesigneraltiumdesignerCommercial
cadencelogoCadence OrCAD SolutionsOrCADSoftwareCommercial
designsoftlogoTINA Design SuiteTINAcalculatorCommercial
5Spice5Spice5SpiceProCommercial
intusoftlogoICAP/4 icapsoftwareCommercial
labcenterlogoProteus proteussoftwareCommercial
lineartechnologyLTSpice IVltspicesoftwareFree
nationalinstrumentsNI Multisim MultisimCommercial
penzarlogoTopSpicetopspiceCommercial
spectrumlogoMicro-Cap Micro-CapCommercial
logoOpusSpiceSpice OpusspiceopusFree
triadsemilogoViaDesigner SuiteViaDesignerCommercial
visionicsEDWinXPedwinxpCommercial