# Quick Solutions to Solve SPICE Convergence Issues.

This article focuses on PSPICE, but most of the parameters and their settings  are common to other SPICE versions like XSPICE NGSPICE IsSPICE HSPICE.

The SPICE simulation convergence issues mainly occur for 3 types of problems:

• #### Circuit Topology Errors

these types of errors are often signaled with precise messages from the SPICE simulation software and it is easy to identify and correct them.

• #### SPICE simulator Options Settings

for example, in the transient analysis, it ‘s necessary to consider the right timestep for the working frequency of the device, and in some cases we have to settle for moderate accuracy,  because tighter the accuracy become and more likely we can find convergence errors.

• #### Unrealistic SPICE models

convergence problems can arise from SPICE models with strong non-linearities and discontinuities.

Now let’s see what are the quick solutions to solve the most common convergence issues due to these different types of problems.

## Circuit Topology Errors

Missing ground, error message: Node is floating.

The SPICE algorithm calculates the voltage of each point of the circuit with respect to a reference point,
this reference point is precisely the ground which must necessarily be present in the circuit.
It ‘s enough to add the ground reference wherever we wish.

Missing DC path to ground, error message: Node is floating.

For the reasons explained in the previous case, it is necessary to check that no point of the circuit is isolated
from the ground reference. If we want to “simulate” an isolation of a node from the ground, we do it placing a
very high value resistor, which actually maintains the continuity with the ground reference.
Check that the node has a direct connection with the ground reference.

Unmodeled pins, error message: Less than two connections at node

this error occurs when there is no PSpice model attached to the Capture part or when there’s a
wire “floating”, that is connected to a device pin without connection to another pin.

Avoid loops containing voltage sources or inductor, error message: voltage source or inductor loop

We can add a small series resistance.

Avoid series cpacitors o current sources

verify that there are no series capacitors or series current sources.

## Convergence Problems due to SPICE Simulation options settings

First of all it is necessary to set the timestep appropriately for the device we are simulating. For example, if we want to simulate an oscillator at 1 khz, with a period of T=1ms, we ‘ll have to set a timestep of the order of T/10 or lower, to have a decent resolution of the simulation.
Let’ s distinguish the solutions that can be adopted in the two main types of analysis, DC and Transient.
Once DC convergence is achieved the AC analysis will also converge.

SPICE DC convergence solutions

ITL1: set ITL1=500, this set iterations limit that SPICE will perform for DC and bias.

ITL2: set ITL2=500, this set iterations limit that SPICE will perform for DC and bias before giving up.

ITL6: set ITL6=100 (Advanced Options), this increases Source stepping iteration limit, Default value
is 0, which disables source stepping.

reduce ABSTOL Absolute current tolerance, it should be set to about 8 orders of magnitude below the level of maximum current,
the dafault value is 1pA

Reduce VNTOL Absolute voltage tolerance, as for ABSTOL it should be set to about 8 orders of magnitude below the level of maximum voltage, the default value is 1uV

Reduce RELTOL this is the relative error allowed for node voltage and branch current. Set RELTOL= 0.01 to reach a compromise between accuracy and simulation run time. The default value is 0.001.

GMIN set GMIN = 1n or 0,1n. GMIN is the minimum conductance across all semiconductor devices

GMINSTEPS (Advanced Options) set GMINSTEPS=200 . this option adjusts the number of increments for GMIN
during the DC analysis.

Change DC Power supplies into Pulse generator

NODESETs use .NODESETs statement to assign a voltage to a node. This can be done for example when the node-voltage table shows unrealistic voltages. If it’s not available a proper estimation of the node DC voltage, use
a .NODESET of 0V.

SPICE Transient Convergence solutions

RELTOL also for the transient analysis Set RELTOL= 0.01 (The default value is 0.001), that decreases the accuracy
of the simulation by increasing the error tolerance required for convergence.

ITL4 set ITL4=2000 , this increases the number of iterations before a nonconvergence warning is issued

reduce ABSTOL Absolute current tolerance, it should be set to about 8 orders of magnitude below the level of maximum current, the dafault value is 1pA

Reduce VNTOL Absolute voltage tolerance, as for ABSTOL it should be set to about 8 orders of magnitude below the level of maximum voltage, the default value is 1uV

ITL5 set ITL5=0 that assigns infinity to the total transient iteration limit.

Reduce rise and fall of PULSE sources

GEAR (Advanced Options) Select METHOD=GEAR, this is the integration method that SPICE uses to solve transient equations. Very useful for oscillators and switching circuits SPICE simulations.

TRTOL set TRTOL=40. this is the tolerance for integration error calculated using transient analysis. The TRTOL
value should NOT be greater than 1/RELTOL. the default value is 7.

IC set Initial conditions for the capacitors at their expected operating voltage. Setting this data causes
SPICE to bypass the DC operating point analysis.

## Use reliable SPICE models.

As we know The SPICE models do not coincide with the devices they model, but represent only a partial description of them. SPICE models with strong discontinuities or non-linearities can create serious convergence problems.
These discontinuities can originate from the omission of certain device behaviors, such as element parasitics,
capacitance for all semiconductor junctions, stray capacitance, RC snubbers around diodes.
In most cases we can rely on the SPICE models released by vendors, if instead we model the device directly, we have to smooth as much as possible any cause of discontinuities and nonlinearities.

Reference:

EMA Design Automation Resolving Simulation Errors
SPICE Circuit Handbook Steven. M Sandler Charles Hymowitz