8 stage Voltage-Controlled Delay Line

0 Credits

231f6ed0-ce02-4c10-a8d0-55fe518c4d99.zip

Login for download

Description

SPICE simulation of an 8 stage voltage controlled delay line. The VCDL is used to provide delay in a delay locked loop (DLL). This schematic has eight delay cells. The differential inputs were generated using an inverter and a transmission gate. The outputs are evenly spaced and they only swing up to Vref = 500mV. This is done to minimize the effects of power supply and ground noise on the delay of the circuit.

Reviews

There are no reviews yet.

Be the first to review “8 stage Voltage-Controlled Delay Line”

Your email address will not be published. Required fields are marked *