Public info about the author: Federico

SPICE simulation enthusiast
  • SPICE simulation of a Flip flop D implemented with two latch synchronous to solve the problem of “transparency”.

  • PSpice simulation of a 24 Bit comparator implemented with 4 Bit Comparators.

  • SPICE simulation of a 4 bit shift register Parallel Input Parallel Output implemented with D flip flop.

  • SPICE simulation of a Serial Input Serial Output shift register implemented with flip flop D.

  • SPICE simulation of JK flip flop implemented with a D flip flop, it solves the drawback of indetermination when both J and K are 1.