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Sample And Hold Circuits

SPICE projects of Sampler circuits for analog-to-digital-converters

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  • Sampler Circuit with Anti-aliasing Filter

    Created by tobytone, published on 13-12-2012

    according to the Shannon's theorem, a signal must be sampled at a frequency greater than twice the highest frequency component in the analog signal for recovering the original waveform. Low-pass filtering prevents aliasing (extra frequency generated). A PCM sampling rate of 8Khz for example means a 4 kHz theoretical maximum input signal frequency. This circuit implements an anti-aliasing second-order Sallen and Key active low-pass filter preceding a dual sampling switch IC CD 4016.

    FREE

    (only to registered users)

    Project Type: Free

    Complexity Spice Software Software Version Full version Components number
    Intermediate PSpice 9.1+ No 11-20

    Path: SPICE Projects > General Electronics > Sample And Hold Circuits

  • Operation Mode of Sample and Hold circuits

    Created by LTspiceDesigner, published on 09-11-2012

    The output of a circuit latches the input signal when the S/H input is High, the other output circuit follows the input signal when the clock input is high.

    FREE

    (only to registered users)

    Project Type: Free

    Complexity Spice Software Software Version Full version Components number
    Simple LTspice IV No <10

    Path: SPICE Projects > General Electronics > Sample And Hold Circuits

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